A simple clocked D FF may be made with a 74LS00 Quad NAND gate and a...
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A simple clocked D FF may be made with a 74LS00 Quad NAND gate and a 74LS04 Inverter. Note the diagram below. SET Clock ē Locate the NAND and Inverter chips, and plug in as usual (pin 7=0V, pin 14-5V). Connect the four NAND gates of the 74LS00 as shown (choice of which gate in each position is arbitrary - use the pin-out diagram as required). Connect a switch to one NAND input as shown and also to an inverter input. Connect the output of the inverter to the other forward-positioned NAND. Connect the + output of a pulse switch to the other two inputs on the forward NANDS. The output of the two downstream NANDs should be to two LEDs. Turn on the power. Once again, the FF can come up in an arbitrary state, so with the switch for the D signal in the low (0) position, toggle clock. The FF should reset (Q=0, Q-1 and the QLED should be off, the Qon). Now put the D switch in the on (1) position and toggle clock. The FF should set (Q LED on, QLED off). Note that although our FF construction is very simple (no independent Set and Reset - all functions must be clocked), there is no possibility of a forbidden state. The Set/Reset inversion pair assures that either the FF Set or Reset is always high, so that the inputs always result in a stable situation. Take some time to exercise the FF and get used to its operation. Then turn off the power and dismantle the circuit. A simple clocked D FF may be made with a 74LS00 Quad NAND gate and a 74LS04 Inverter. Note the diagram below. SET Clock ē Locate the NAND and Inverter chips, and plug in as usual (pin 7=0V, pin 14-5V). Connect the four NAND gates of the 74LS00 as shown (choice of which gate in each position is arbitrary - use the pin-out diagram as required). Connect a switch to one NAND input as shown and also to an inverter input. Connect the output of the inverter to the other forward-positioned NAND. Connect the + output of a pulse switch to the other two inputs on the forward NANDS. The output of the two downstream NANDs should be to two LEDs. Turn on the power. Once again, the FF can come up in an arbitrary state, so with the switch for the D signal in the low (0) position, toggle clock. The FF should reset (Q=0, Q-1 and the QLED should be off, the Qon). Now put the D switch in the on (1) position and toggle clock. The FF should set (Q LED on, QLED off). Note that although our FF construction is very simple (no independent Set and Reset - all functions must be clocked), there is no possibility of a forbidden state. The Set/Reset inversion pair assures that either the FF Set or Reset is always high, so that the inputs always result in a stable situation. Take some time to exercise the FF and get used to its operation. Then turn off the power and dismantle the circuit.
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1 Locate the 74LS00 Quad NAND gate and 74LS04 Inverter chips 2 Connect pin 7 of both chips to ground ... View the full answer
Related Book For
Holt McDougal Larson Geometry
ISBN: 9780547315171
1st Edition
Authors: Ron Larson, Laurie Boswell, Timothy D. Kanold, Lee Stiff
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