Question: 3 . Consider the following loop: Assume that there is no delay slot and the branch is solved in the ID stage. Also assume that

3. Consider the following loop:
Assume that there is no delay slot and the branch is solved in the ID stage. Also assume that the loop is iterated for 100 iterations. Assume full data forwarding.
(1) Draw the pipeline diagram for the first 2 iterations.
(2) How many cycles does it take to complete the Instruction sequence?
(3)If one bit branch predictor is used, which is initialized to (i.e. branch not taken), how many correct and wrong prediction that it will produce? How long will be the execution time of the above code?
3 . Consider the following loop: Assume that

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