$3$

$.$

$$Design a

$4$

$-$

bit synchronous counter that counts the prime integer numbers greater than

one and less than

$1$

$5$

$.$

$$The counter shall start counting from the smallest prime integer up

to the greatest prime integer in the above range. Once the counter reaches the greatest

prim integer, it goes back and starts counting from the smallest prime integer. Use JK

flip flops and any necessary logic gates to build this counter.

a

$.$

$$Write down the excitation table of the JK flip flop.

b

$.$

$$Draw the state diagram of the counter.

c

$.$

$$Specify how many flip flop required to build this counter

$($

explain your answer

$)$

$?$

d

$.$

$$Write down the transition table.

e

$.$

$$Use k

$-$

maps to find the equations of the flip flop inputs.

f

$.$

$$Plot the logic circuit of your counter