3. The MIPS ISA was explicitly designed to be simple and regular which helps improve execution performance. The following questions consider changes to the ISA and what their effects might be. a. If the MIPS architecture was modified to provide 64 registers rather than 32, how would the size of the fields specifying the register numbers change? How would the size of R-type and I-type instructions be affected by this change? b. If the number of instructions in the MIPS ISA were doubled, which fields in the R- type and I-type instructions would likely change? Explain briefly All instructions in the MIPS ISA are encoded in a single word. If the MIPS ISA were to support instruction of varying lengths (e.g. 1. 2 or 3 words) what impact would this have on the time required to fetch and decode instructions? Explain briefly c