3. We wish to design a ROM / latch state machine using the Logisim hardware shown:...

Transcribed Image Text:

3. We wish to design a ROM / latch state machine using the Logisim hardware shown: Clock D Q eno A 000000000 sel The bus lines are three bits (except for the final input to the seven- segment display). How big is the ROM? Find the contents of the ROM for both an up-counter and a down-counter. (Both counters are three bits.) 3. We wish to design a ROM / latch state machine using the Logisim hardware shown: Clock D Q eno A 000000000 sel The bus lines are three bits (except for the final input to the seven- segment display). How big is the ROM? Find the contents of the ROM for both an up-counter and a down-counter. (Both counters are three bits.)