3.12 Consider an 8-bit bit-parallel ALU with only four functions: add, subtract, and bit-wised AND and...

Transcribed Image Text:

3.12 Consider an 8-bit bit-parallel ALU with only four functions: add, subtract, and bit-wised AND and XOR. Assume an adder/subtractor module uses a hybrid adder designed from CLA(2) modules. In addition, the overflow flag must be masked out when performing bitwise computation. Assume only 8-bit, 2-to-1 MUXS are available. Do the following: a. Draw the data path and estimate its propagation delay assuming 0.1 ns delay for each NOT and NAND gate. b. Construct the truth table for its Map module. 3.12 Consider an 8-bit bit-parallel ALU with only four functions: add, subtract, and bit-wised AND and XOR. Assume an adder/subtractor module uses a hybrid adder designed from CLA(2) modules. In addition, the overflow flag must be masked out when performing bitwise computation. Assume only 8-bit, 2-to-1 MUXS are available. Do the following: a. Draw the data path and estimate its propagation delay assuming 0.1 ns delay for each NOT and NAND gate. b. Construct the truth table for its Map module.

Answer rating: 100% (QA)

Here is the graph diagram of the 8bit ALU data path The Map module of an ALU controls the selection ... View the full answer