$0.$ Write Verilog code to define the following two circuits $.$ Your code should be complete so it can be simulated as written $($you can use the module statements below to get started$).($Hint: My answers fit in the space I left on the answer sheet. Yours don$$t need to fit in that small of space $$ you can use as many lines as you want $$ but my point is$,$ the Verilog programs don$$t need to be very long.$)$ A$.(16$ points$)$ Define a circuit based on a $16-$bit up$-$counter that increments on each clock edge when A is asserted, and holds its current count value when A is not asserted. When the counter value is less than D$,$ X is asserted, and whenever the counter is greater than D$,$ Y is asserted. B$.(14$ points$)$ Write Verilog to define a combinational ALU that can perform one of four functions on the $8-$bit input operands $($A and B$).$ In addition to the A and B input busses, the ALU also has a two$-$bit input Sel, an $8-$bit output F that shows the result of the ALU operation, and an output signal Z that is asserted whenever F equals zero. The required operations are add, shift A right by $1$ bit, a bit$-$wise and, and a bitwise xor $($note: bit$-$wise means the operation works on pairs of like$-$numbered bits$).$