3.3. (20 points) Take the 1-bit comparator you design as a building block (i.e., draw it as a box with 2 inputs and 3 outputs), now use two of these and other logic gates to design a 2-bit unsigned magnitude comparator. The new comparator consists of 4 inputs: A[1:0) and B[1:0). and 3 outputs: AB AB, and A B. Please show your logie circuits schematic AB- AB' (AB) = A'B'+AB AO BO_ A0 == BO A> A1 B1 A== B A1 == B1