Question: 3a. Draw the circuit diagram for this encoder by using simple logic gates (2-input and, 2-input or, and not gates). 3b. Can you reduce the

3a. Draw the circuit diagram for this encoder by using simple logic gates (2-input and, 2-input or, and not gates).
3b. Can you reduce the number of used logic gates by gate sharing? Give the number of used logic gates and draw the corresponding circuit.
please provide detailed steps thanks
3. The truth table of the priority encoder has been given below: Inputs Outputs D32 D2 D14 DO A12 A02 ve T 02 02 0 02 02 1 02 02 02 12 0 02 12 1 0 0 12 X 0 12 12 T. 0 12 X X le 0 12 12 xe xe X2 12 12 12 2
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