Question: 4 . 1 1 ) ( 4 . 1 0 in the 3 rd edition ) In parts f and g report what bank (
in the rd edition In parts f and g report what bank aka row the addressed
word is in and what the offset is within the bank.
Also note, this question asks you to redo problem and problem part g has a typo.
It says to repeat exercise f when what part g should actually say is repeat exercise f
Redo exercise assuming a M times memory built using K times RAM chips.
a How many RAM chips are necessary?
b If we were accessing one full word, how many chips would be involved?
c How many address bits are needed for each RAM chip?
d How many banks rows will this memory have?
e How many address bits are needed for all memory?
f If highorder interleaving is used, where would address which is E in hex be
located?
g Repeat exercise f for loworder interleaving.
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