40 66 a) Study the following LMC memory content. Memory location Contents 104 41 88 42 43 55 44 106 45 100 46 22 47 11 Assume the index register (XR) and base register (BR) contain 03 and 01, respectively. b) Study the following RTL steps. PC > MAR M[MAR] > MDR MDR > IR PC + 1 > PC PC > MAR M[MAR] > MDR MDR > MAR M[MAR] > MDR MDR > ACC PC + 1 > PC Assume some LMC instructions occupy two mailboxes. Let's consider instruction STO 43. Two consecutive mailboxes are required to store the opcode (STO) and the operand (43). Write down the LMC instruction and addressing mode that can be best represented by the above RTL steps. [3]