(40 pts) Use the cache simulator to experiment with the following design options. http://www.ecs.umass.edu/ece/koren/architecture/Cache/default.htm. a. -If you have a system with 128MB of RAM, Cache of 64KB, and Block size of 3. 4 bytes, and no change to one row per block, how many bits is your address and how is it divided up? Answer each in number of bits. Address size _Tag IndexOffset b. Ifyou double the amount of RAM, what will the values be now? Address size Tag Index_ Offset c. If you shrink the Index by 1 bit, what does it indicate? If you have n bits in the tag, and m in the offset, and 1 total bits in an address, how many sets are there in the cache? d. (40 pts) Use the cache simulator to experiment with the following design options. http://www.ecs.umass.edu/ece/koren/architecture/Cache/default.htm. a. -If you have a system with 128MB of RAM, Cache of 64KB, and Block size of 3. 4 bytes, and no change to one row per block, how many bits is your address and how is it divided up? Answer each in number of bits. Address size _Tag IndexOffset b. Ifyou double the amount of RAM, what will the values be now? Address size Tag Index_ Offset c. If you shrink the Index by 1 bit, what does it indicate? If you have n bits in the tag, and m in the offset, and 1 total bits in an address, how many sets are there in the cache? d