4.27 Problems in this exercise refer to the following sequence of instruction assume that it is executed on a five-stage pipelined datapath ns, and ADD X5, X2, X1 LDUR X3, [X5, #4] LDUR X2, [X2, #0] ORR X3, X5, X3 STUR X3, [X5, #0 ] 4.27.1 [5] If there is no forwarding or hazard detection, insert NOPs to ensure correct execution. 4.27.2 [10] Now, change and/or rearrange the code to minimize the number of NOPs needed. You can assume register X7 can be used to hold temporary values in your modified code. 4.27.3 (10] If the processor has forwarding, but we forgot to implement 4.27.4 [20] If there is forwarding, for the first seven cycles during the 4.27.5 [10] For the new hazard detection unit from 4.26.5, specify which output signals it asserts in each of the first five cycles during the execution of this code