4.31 In this exercise we compare the performance of 1-issue and 2-issue processors, taking into account program transformations that can be made to optimize for 2-issue execution. Problems in this exercise refer to the following loop (written in C):

for ( i = 0; i !=j ; i += 2)

b [ i ] = a[ i ] a[ i + 1];

A compiler doing little or no optimization might produce the following LEGv8 assembly code:

MOV X5, XZR

B ENT

TOP: LSL X10, X5, #3

ADD X11, X1, X10

LDUR X12, [X11, #0]

LDUR X13, [X11, #8]

SUB X14, X12, X13

ADD X15, X2, X10

STUR X14, [X15, #0]

ADDI X5, X5, #2

ENT: CMP X5, X6

B.NE TOP

The code above uses the following registers:

Assume the two-issue, statically scheduled processor for this exercise has the following properties:

1. One instruction must be a memory operation; the other must be an arithmetic/logic instruction or a branch.

2. The processor has all possible forwarding paths between stages (including paths to the ID stage for branch resolution).

3. The processor has perfect branch prediction.

4. Two instruction may not issue together in a packet if one depends on the other.

5. If a stall is necessary, both instructions in the issue packet must stall.

As you complete these exercises, notice how much effort goes into generating code that will produce a near-optimal speedup.

a). Draw a pipeline diagram showing how LEGv8 code given above executes on the two-issue processor. Assume that the loop exits after two iterations.

b). What is the speedup of going from a one-issue to a twoissue processor? (Assume the loop runs thousands of iterations.)

c). Rearrange/rewrite the LEGv8 code given above to achieve better performance on the one-issue processor. Hint: Use the instruction CBZ X6, XZR, DONE to skip the loop entirely if j = 0.

d). Rearrange/rewrite the LEGv8 code given above to achieve better performance on the two-issue processor. (Do not unroll the loop, however.)

e).Repeat Exercise (a), but this time use your optimized code from Exercise (d)

f). What is the speedup of going from a one-issue processor to a two-issue processor when running the optimized code from Exercises (c) and (d).

g). Unroll the LEGv8 code from Exercise (c) so that each iteration of the unrolled loop handles two iterations of the original loop. Then, rearrange/rewrite your unrolled code to achieve better performance on the oneissue processor. You may assume that j is a multiple of 4.

Temporary values X5 X6 X1 X2 X10-X15 Temporary values X5 X6 X1 X2 X10-X15