4.6 Section 4.4 does not discuss I-type instructions like ADDI or ANDI.

4.6.1 [5] What additional logic blocks, if any, are needed to add I-type instructions to the CPU shown in the figure? Add any necessary logic blocks to Figure 4.23 and explain their purpose.

4.6.2 [10] List the values of the signals generated by the control unit for ADDI. Explain the reasoning for any Dont Care control signals.

Figure 4.23

Add Shift Reg2Loc Uncondbrancheft 2 MemRead MemioReg nsbtucfion 31-211 Cantrol nstrudtion 9-6 Read Read PC address Zero Instructon 31-0 ngister 2 Read Whrite Read Instruction | Instudn 4-0 memory |data Registers Write Data data memory ? Sign- xtend nstruction 31-32 ALU control Intruction 31-21 Add Shift Reg2Loc Uncondbrancheft 2 MemRead MemioReg nsbtucfion 31-211 Cantrol nstrudtion 9-6 Read Read PC address Zero Instructon 31-0 ngister 2 Read Whrite Read Instruction | Instudn 4-0 memory |data Registers Write Data data memory ? Sign- xtend nstruction 31-32 ALU control Intruction 31-21