49. RISC and CISC microprocessor architecture differ in the amount of primary memory they depend on to execute program instruction commands 30. The CPU can acquire one or more interrupt requests (IROS) while idle and awaiting the completion of an operation of another device in the computer system. 31. With the exception of new multicore processors, level 2 and level 3 cache is always located within the CPU 52. Boolean data types have two data values, represented in binary digits 1 and 0 as true or false. 53. Files saved on to a hard disk are often stored in one or more clusters within track sectors that may not necessarily be located next to each other. 54. Multitasking automatically interrupts a running program and deletes all its memory and CPU register contents to make room. 55. When a program is loaded into the main memory it becomes a process