Question: 5 . 2 . 3 [ 2 0 ] < 5 . 3 , 5 . 4 > You are asked to optimize a cache

5.2.3[20]<5.3,5.4> You are asked to optimize a cache design for the given references. Th ere are three direct-mapped cache designs possible, all with a total of 8 words of data: C1 has 1-word blocks, C2 has 2-word blocks, and C3 has 4-word blocks. In terms of miss rate, which cache design is the best? If the miss stall time is 25 cycles, and C1 has an access time of 2 cycles, C2 takes 3 cycles, and C3 takes 5 cycles, which is the best cache design? Th ere are many diff erent design parameters that are important to a caches overall performance. Below are listed parameters for diff erent direct-mapped cache designs. Cache Data Size: 32 KiB Cache Block Size: 2 words Cache Access Time: 1 cycle

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