5. (4 points Completeness) Multi Level Caches: Described below is an experiment conducted on a processor to study its memory subsystem An element is read at random from an array of integers (size of int: 4 bytes), and the time taken to do 165 million such random reads(loads)is calculated. Below is the latency plot generated as the size of the array 21 20 19 18 17 16 15 o 14 E 13 O 12 2 11 10 9 2 0 0 1 2 3 4567 8 9 1011 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Array size in log scale (base 2) What can you conclude about the memory subsystem of the processor? (The ber of levels of cache, latency, minimum size of the cache and so on.) 5. (4 points Completeness) Multi Level Caches: Described below is an experiment conducted on a processor to study its memory subsystem An element is read at random from an array of integers (size of int: 4 bytes), and the time taken to do 165 million such random reads(loads)is calculated. Below is the latency plot generated as the size of the array 21 20 19 18 17 16 15 o 14 E 13 O 12 2 11 10 9 2 0 0 1 2 3 4567 8 9 1011 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Array size in log scale (base 2) What can you conclude about the memory subsystem of the processor? (The ber of levels of cache, latency, minimum size of the cache and so on.)