5. (4 points - Completeness)Multi Level Caches: Described below is an experiment conducted on a processor to study its memory subsystem: An element is read at random from an array of integers (size of int: 4 bytes), and the time taken to do 165 million such random reads(loads) is calculated. Below is the latency plot generated as the size of the array ncreases 21 20 19 18 16 O 15 o 14 13 n 12 2 11 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Array size in log scale (base 2) What can you conclude about the memory subsystem of the processor? (The number of levels of cache, latency, minimum size of the cache and so on 0 2. (10 points Correctness) Cache Misses: Consider the following code: int M[64] int num-0; for (int . 0; i