5. Highlight relevant paths and mark signal values (in hex or binary) when MIPS instruction lw $6, 40 ($2) passes through the MIPS datapath shown below. Assume that $2 contains 00002200 hex and $6 contains 00006600 hex. The offset 40 is in hex as well. The contents of a memory address x can be denoted by M[x], eg: content of address 0 is M[0] and content of

address 1000 is M[1000].

Which bits from the instruction register must be connected to SR1?

Which bits from the instruction register must be connected to SR2?

What should be connected to DR?

What should be connected to Immediate Offset lines?

If a store (eg: sw $2, 20($3)) instruction is executed, what Instruction register bits must be connected to

the following?

SR1= ____________________

SR2=______________________

DR=____________________

Immediate Offset? =______________

What IR bits are the usual destination field?

What instructions are exceptions to this rule?

6. Highlight relevant paths and mark signal values (in hex or binary) when MIPS instruction 0x08000080 located at address 0x30003000 is executed using the following hardware.