5. Memory-Bandwidth Wall [15 marks]

When a cache is used temporally, it acts as a bandwidth amplifier.

Specifically, the effective operand bandwidth reaching the pipeline is the

actual operand bandwidth reaching the processor divided by the miss rate.

Suppose we must deliver an actual operand bandwidth of 'n' words/second to

the processor to sustain a floating-point performance of 'n/m' flops/second,

where 'm' is the miss rate of the D-cache. Typically, we need a new word

from either the cache or the memory for each flop. By assumption, 'm' is

always 0.01. Today, the actual operand bandwidth delivered to the processor

is 8 * 10^7 words/second and the peak floating-point performance is 2 * 10^9

flops/second. If peak floating-point performance increases by a factor of

2.2 every year and memory bandwidth increases by a factor of 1.3 every year,

after how many years will the memory bandwidth be sufficient so that the

sustained floating-point performance equals the peak performance?