5. Question 5 - chapter 9 a) What happens when the HOLD input to the 8086/8088 is placed at its logic 1 level? b) Which bus connections on the 8088 microprocessor are typically demultiplexed? c) If the CLK input to the 8086/8088 is 4 MHz, how long is one bus cycle? d) How much time is allowed for memory access when the 8086/8088 is operated with a 5 MHz clock? e) What main function is provided by the 8288 bus controller when used with 8086/8088 maximum mode operation