6. Consider a multicycle processor with stages IF ID EX MEM WB that splits the EX stage to 4 (EX1, EX2, EX3, EX4) for MULT and DIV instructions, and the MEM stage to 3 and (M1, M2, M3, M4) for LD and ST instructions respectively. How many cycles would the following program take to run? mov r6, #40 mov r2, #0 mov r4, #0 mov r5, #5 loop: ld r1, O(r2) addi r2, r2, #4 mult r3, r1, r5 st r3, 0(r4) addi r4, r4, #4 bne r4, r6, loop