6.9 Consider the following three CPU organizations:

CPU SS: A 2-core suprescalar microprocessor that provides out-of-order issue capabilities on 2 function units (FUs). Only a single thread can run on each core at a time.

CPU MT: A fine-grained multithreaded processor that allows instructions from 2 threads to be run concurrently (i.e., there are two functional units), though only instructions from a single thread can be issued on any cycle.

CPU SMT: An SMT processor that allows instructions from 2 threads to be run concurrently (i.e., there are two functional units), and instructions from either or both threads can be issued to run on any cycle.

Assume we have two threads X and Y to run on these CPUs that include the following operations:

Thread X	Thread Y
A1 - takes cycles to execute	B1 - takes 2 cycles to execute
A2 - no dependencies	B2 - conflicts for functional unit with B1
A3 - conflicts for a functional unit with A1	B3 - depends on the result of B2
A4 - depends on the result of A3	B4 - no dependencies and takes 2 cycles to execute

Assume all instructions take a single cycle to execute unless noted otherwise or they encounter a hazard.

6.9.4 [10] <6.4> Assume you have 1 SMT CPU. How many cycles will it take to execute the two threads? How many issue slots are wasted due to hazards?