Assume all instructions take a single cycle to execute unless noted otherwise or they encounter a hazard.

a. List out the operation sequence for each core of the CPU SS that executes these two threads.

b. List out the operation sequence for each functional unit of the CPU MT that executes these two threads.

c. List out the operation sequence for each functional unit of the CPU SMT that executes these two threads.

2. Consider the following three CPU organizations: CPU SS: A 2-core superscalar microprocessor that provides out-of-order issue capabilities on 2 function units (FUs). Only a single thread can run on each core at a time CPU MT: A fine-grained multithreaded processor that allows instructions from 2 threads to be run concurrently (i.e., there are two functional units), though only instructions from a single thread can be issued on any cycle CPU SMT: An SMT processor that allows instructions from 2 threads to be run concurrently (i.e., there are two functional units), and instructions from either or botlh threads can be issued to run on any cycle. Assume we have two threads X and Y to run on these CPUs that include the following operations Thread X Thread Y A1-takes 3 cycles to execute A2 - no dependences A3-conflicts for a functional unit with A1 A4 depends on the result of A3 B1 - take 2 cycles to execute B2 -conflicts for a functional unit with B1 | B3-depends on the result of B2 B4-no dependences and takes 2 cycles to execute