7) Given a 5-stage MIPS pipeline implementation indicate which forwarding path will be used by the following sequence of instructions. Use the ??/??->?? notation where ??/?? designates the source flip/flop (e.g. EXE/MEM) and the last ?? indicates the cycle in which the forwarding path will be active.

sub $t2, $t4, $t1

and $t3, $t1, $t0

lw $t5, 4($t1)

beq $t1, $t2, Label

8) Unroll the following loop four times and optimize the resulting instruction sequence. Assume the loop count is a multiple of four. Further assume the 5-stage MIPS pipeline with ID-stage branch resolution, and make sure that no bubbles need to be generated by the CPU. [Hint: There is a source dependency on $t1; be careful about bubbles from this!]

label: sw $zero, 0($t1) //note original had a typo comma here

addi $t1, $t1, 4

bne $t1, $t2, label