$(8$ marks$)$ PerformanceAssume a MIPS processor is running the following instruction:addi $so$,$ $s$1,$ $ffff Give the values of ALL control signals generated by this instruction for its basic implementation in the shown MIPS pipelined datapath by completing the table below. $(6$ marks$)$B$)$ Determine the sizes and values of the data at the points: A$,$ B$,$ C$,$ and D as placed on theabove figure. Assume that register Ssl $=5.(2$ marks$)$