$9\mathrm{.}7$ Binary Codes

$**$ Lab Description: $**$ Create a Verilog module named "grey$\_$code" which outputs all $16$ min$-$terms of $4$ bit grey code, given all $16$ min$-$terms of normal binary code as input. Input Signals: A$,$B$,$C$,$D; Output Signal: $F-4$ bits $-$ Index zero should be the LSB of $"$F$\text{'}$s$"$ grey code output.

Reference Zybook sections: $1\mathrm{.}16-1\mathrm{.}17$