A: $0AA,B$:$01,$ sub: $01,$ func: $0,$ OUT: $0A1$

$2$

Multiple Answer $1$ point

Which of the following are true about negative edge$-$triggered

Master$-$Slave D flip$-$flops? Answer all that apply.

The data in the D input gets transferred to the output Q immediately after the clock input goes from $0$ to $1.$

The Slave lets the data pass through when the clock level is a $0$

The Master locks the data on the falling edge of the clock

They are implemented with two pass$-$thru latches, one is the Master the other the Slave

The Master latch passes the data through when the clock level is a $0$

The Master keeps the data locked when the clock level is a $0$

$3$

Multiple Choice

$1$ point