A $1$MB memory block is constructed from $16$KB memory block. The target memory word is $64$b and the base memory building block word is $8$b$.$ The memory tiles are arranged in $2$D array M$[$i$][$j$],$ where row index $($i$)$ expand the memory depth, and column index $($j$)$ expands the word size. Answer the following questions about this memory architecture:

$1)$ The number of rows of the $1$MB memory block is: $\_\_\_\_$

$2)$ The number of columns of the $1$MB memory block is: $\_\_\_\_$

$3)$ The data bus width, in bits, of the $1$MB memory block is: $\_\_\_\_$

$4)$ The address width, in bits, of the $1$MB memory block is: $\_\_\_\_$

$5)$ Byte address $0$x$98765$ lies on tile $\_\_\_\_($format: i$,$j $)$