A 2-bit binary comparator designed by using synchronous state machine has two outputs. The outputs are always equal to (00) unless one of the following cases occurs: 1. If the present input value is greater than the previous input value, the first and second outputs are logic 1 and logic 0, respectively. 2. If the present input value is less than the previous input value, the first and second outputs are logic 0 and logic l", respectively. How many states are required to draw minimal Mealy state diagram for the aforementioned state machine? * 07 O 5 4 00