a) A three-stage pipeline is shown as below: data in L1 FL1 L:NGT-Triggered Latch FL: Functional...
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a) A three-stage pipeline is shown as below: data in L1 FL1 L:NGT-Triggered Latch FL: Functional Logic (asynchronous circuit) L2 L3 FL2 FL3 L4 ++= data out CLK propagation, delay 5ns 40 ns 5ns 30ns 5ns 25ns 5ns Fig. 1 i. Identify the slowest component in the pipeline. Justify your answer. [4 Marks] ii. Calculate the minimum period is the total propagation delay in the pipeline. [4 Marks] Calculate the maximum operating frequency of this pipeline. [4 Marks] iv. Draw and label the timing diagram. tobetting [6 Marks] a) A three-stage pipeline is shown as below: data in L1 FL1 L:NGT-Triggered Latch FL: Functional Logic (asynchronous circuit) L2 L3 FL2 FL3 L4 ++= data out CLK propagation, delay 5ns 40 ns 5ns 30ns 5ns 25ns 5ns Fig. 1 i. Identify the slowest component in the pipeline. Justify your answer. [4 Marks] ii. Calculate the minimum period is the total propagation delay in the pipeline. [4 Marks] Calculate the maximum operating frequency of this pipeline. [4 Marks] iv. Draw and label the timing diagram. tobetting [6 Marks] a) A three-stage pipeline is shown as below: data in L1 FL1 L:NGT-Triggered Latch FL: Functional Logic (asynchronous circuit) L2 L3 FL2 FL3 L4 ++= data out CLK propagation, delay 5ns 40 ns 5ns 30ns 5ns 25ns 5ns Fig. 1 i. Identify the slowest component in the pipeline. Justify your answer. [4 Marks] ii. Calculate the minimum period is the total propagation delay in the pipeline. [4 Marks] Calculate the maximum operating frequency of this pipeline. [4 Marks] iv. Draw and label the timing diagram. tobetting [6 Marks] a) A three-stage pipeline is shown as below: data in L1 FL1 L:NGT-Triggered Latch FL: Functional Logic (asynchronous circuit) L2 L3 FL2 FL3 L4 ++= data out CLK propagation, delay 5ns 40 ns 5ns 30ns 5ns 25ns 5ns Fig. 1 i. Identify the slowest component in the pipeline. Justify your answer. [4 Marks] ii. Calculate the minimum period is the total propagation delay in the pipeline. [4 Marks] Calculate the maximum operating frequency of this pipeline. [4 Marks] iv. Draw and label the timing diagram. tobetting [6 Marks]
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Computer Organization and Design The Hardware Software Interface
ISBN: 978-0124077263
5th edition
Authors: David A. Patterson, John L. Hennessy
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