A byte$-$addressable virtual memory system has the following characteristics:

$$ Each virtual address is $16$ bits.

$$ Each physical address is $14$ bits.

$$ The page size is $512$ bytes.

$$ Each process has a one$-$level page table, and each page table entry $($PTE$)$ is $4$ bytes.

$$ The TLB is directed$-$mapped and has $16$ entries.

$($a$)(2$ points$)$ How many bits are required for the page offset?

$($b$)(2$ points$)$ What is the maximum number of virtual pages a process could have?

$($c$)(2$ points$)$ How many physical pages are there?

$($d$)(2$ points$)$ What is the maximum page table size for a process?

$($e$)(2$ points$)$ Assuming each entry of the TLB has a valid bit, a dirty bit, a reference bit, a tag, and a

physical page number, what is the total number of bits in the TLB$?$