A computation control state machine has four states and two inputs, NX and DU$.$ The machine

cycles through the states in sequence, with the last state returning to the first. The machine only

advances from the current state to the next state if NX is $1.$ The only output is DS $($where the

machine signals some other part of the computer to store a snapshot of critical parts of the

computer$$s memory$).$ DS is asserted if the machine is in the fourth state of the sequence and

DU is asserted. Note: DU does not affect the transitions of the state machine.