A computer system's largest number of memory references, is made by the following LOAD instruction that performs a twy-level memory indirect addressing: LOADR1, [[@DataPir1]] in which: - R1 is a register, but DataPtr1, itself is a memory location. Each pair of square brackets represent a pointer derefrencing. - Once the value is retrieved, it is loaded into the R1 register. - The op-code for the LOAD can straddle two pages. Also each memory access in the operand can straddle two pages. What is the absolute minimum number of frames that should be allocated by this demand-paged system to a process to avoid thrashing? Hint: In addition to accessing DataPtrf in the memory, there are two more memory accesses only to get the data value, 8 6 4 3