a$)$ Create the same $4-$function $8-$bit ALU in verilog in EDA playground in design.sv and a self

checking testbench with testvectors containing inputs and outputs based on the table

above. Print all $5$ inputs and outputs to the screen to show that it matches Part $2$a$.$ Also

display a waveform of the inputs and outputs.

Help me about the output of Alu table and help me to write verilog code in part a please