Question: a) Design XOR and XNOR gate using one 2: 1 MUX Consider the above synchronous sequential circuit. Determine its state table and state diagram. c)

a) Design XOR and XNOR gate using one 2: 1 MUX

a) Design XOR and XNOR gate using one 2: 1 MUX Consider the above synchronous sequential circuit. Determine its state table and state diagram. c) Minimize the expressions and draw the logic diagram of the following functions F(X, Y, Z) = XY + X'YZ' + YZ G(x, y, z) = x'y' + x'yz + xz + xyz

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