A direct$-$mapped L$1$ data cache of size $64$ bytes and block size of $1$ word and word size of $4$ bytes, indexed addresses and tagged using physical addreSE$$s A $4-$way associative data translation lookaside buffer $($TLB$)$ with $16$ page table entries Physical addresses of $32$ bits, and virtual addresses of $40$ bits Byte addressable memory Page size of IMB $(1024*1024$ bytes$)1).$ Perform the physical memory address field encoding, given the $32-$bit physical memory address, how many bits are used for the cache block$/$line index? $2).$ Given the $40$ bits virtual address, how many bits are used for the VPN $($virtual page number$)?3).$ Calculate the number of bits required for the set address in the Translation lookaside buffer $($TLB$).$