(a) Is it possible for a direct-mapped cache to achieve a lower miss rate than a fully-associative cache with LRU replacement policy? Explain and provide an example if necessary. (b) Suppose that you have a cache with n sets, and the block size is b. Now suppose you run a program that shows a striding accesses with a stride of s starting from address 0. That is, the addresses generated would be 0, s, 2s, 3s, 4s, . If n = 32, b = 8 bytes, and s = 32 bytes, identify which sets of the cache would be more heavily utilized than others? (c) Suppose that instead of using number of sets that is a power of two, we switch to a number of sets that is prime, i.e. n = 31, Can you identify which sets of the cache would be more heavily utilized than others? Explain your observation. (a) Is it possible for a direct-mapped cache to achieve a lower miss rate than a fully-associative cache with LRU replacement policy? Explain and provide an example if necessary. (b) Suppose that you have a cache with n sets, and the block size is b. Now suppose you run a program that shows a striding accesses with a stride of s starting from address 0. That is, the addresses generated would be 0, s, 2s, 3s, 4s, . If n = 32, b = 8 bytes, and s = 32 bytes, identify which sets of the cache would be more heavily utilized than others? (c) Suppose that instead of using number of sets that is a power of two, we switch to a number of sets that is prime, i.e. n = 31, Can you identify which sets of the cache would be more heavily utilized than others? Explain your observation