a$.$ Let us assume that processor testing is done by filling the PC$,$ registers, and data and instruction memories with some values $($you can choose which values$),$ letting a single instruction execute, then reading the PC$,$ memories, and registers. These values are then examined to determine if a particular fault is present. Can you design a test $($values for PC$,$ memories, and registers$)$ that would determine if there is a stuck$-$at$-0$ fault on this signal?

b$.$ Repeat $6$a for a stuck$-$at$-1$ fault. Can you use a single test for both stuck$-$at$-0$ and stuck$-$at$-1?$ If yes, explain how; if no$,$ explain why not.

c$.$ If we know that the processor has a stuck$-$at$-1$ fault on this signal, is the processor still usable? To be usable, we must be able to convert any program that executes on a normal MIPS processor into a program that works on this processor. You can assume that there is enough free instruction memory and data memory to let you make the program longer and store additional data. Hint: the processor is usable if every instruction "broken" by this fault can be replaced with a sequence of "working" instructions that achieve the same effect.

d$.$ Repeat $6$ a $,$ but now the fault to test for is whether the "MemRead" control signal becomes $0$ if RegDst control signal is $0,$ no fault otherwise.

e$.$ Repeat $6$ d $,$ but now the fault to test for is whether the "Jump" control signal becomes $0$ if RegDst control signal is $0,$ no fault otherwise.