A logic function is given by the following truth table

ABCDY 00001 00010 00101 00110 01000 01010 01100 01110 10001 10011 10101 10111 11000 11010 11101 11110

Table 5.2.1: Truth table of Part II logic function

1. Derive the canonical sum-of-products (SOP) expression of the function Y(A, B, C, D) from Table 5.2.1.

2. Use the Karnaugh map method (Figure 5.2.1) find the simplest canonical SOP expression of the function Y(A, B, C, D).

0 1 2 3 4 5 6 7 8 9

10

11

12

13

14

15

Page 32 of 58

CD 00 01 11 10 AB

0132

4576 12 13 15 14 8 9 11 10

Figure 5.2.1: Karnaugh map template

3. Draw the logic diagram of the SOP minimised circuit

4. Use De Morgans theorems to express the simplest SOP in terms of NAND operators.

5. Use the Karnaugh map method to find the simplest product-of-sums (POS)

   expression of the function Y(A, B, C, D).

6. Draw the logic diagram of the circuit that implements the POS minimized expression.

   Analyse the circuit that implements the POS minimized expression and determine its truth table

| 0 AECD ABCD | A 0 0 zlo 31 0 4 0 0 0 0 1 B 0 0 o 0 1 1 1 1 0 C 0 0 1 1 0 0 1 1 0 D 0 1 o 1 0 1 0 1 0 OOO OO D00000ooool D ABC ABCD D ABCD 0 ABCD 10 1 ul 1 12 1 13 1 14 1 151 1 0 0 1 1 1 1 1 1 0 0 1 1 0 1 0 1 0 1 | ABCD 0 CD 00 01 11 10 Ia