(a) Minimize the expression f(a,b,c)=abc+abc+bc+ac+abc algebraically into its most minimized SOP form. (b) Reduce the result obtained in part (a) using DeMorgan's theorem with NAND operations only. (c) Draw the logic circuit obtained in part (b) using NAND gates only. Given a logic expression, Y(A,B,C,D)=m(1,2,4,5,6,7,8,11,12,13,14,15) (a) Construct a truth table for the logic expression. (b) Implement the logic circuit using 8-to-1 multiplexer and logic gates for the truth table obtained in part (a). (c) Find its simplest expression for the logic circuit using Karnaugh map method. (d) Implement the logic circuit using NOT, OR and AND gates only for the logic expression obtained in part (c)