Question: A NAND gate has been added as a feedback path for the shift register shown below. The outputs of the circuit are q[3] q[0]. The

A NAND gate has been added as a feedback path for the shift register shown below. The outputs of the circuit are q[3] q[0]. The initial state of the shift register is provided in the timing diagram below. Complete the timing diagram

A NAND gate has been added as a feedback path for the

q[3] q[2] q[O] D O D O D O D O clk clk clk clk clk Signal name ..20 .. . 40..60..80 e clk O q13:0] q12] q[o]

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