A parallel plate capacitor is shown in the figure. The two conducting plates are place at $x=0$ and $x=d.$ Two dielectric materials are placed between them. The dielectric with ${}_1$ is placed in ${}_{2}V=V_{d}S0.$

The lower plate $is$ grounded, while the upper plate $isat$ potential $V=V_d.$ Neglecting any fringe effects,

$aa,$ and the dielectric with ${}_{2}is$ placed $in0.$

The lower plate $is$ grounded, while the upper plate $isat$ potential $V=V_d.$ Neglecting any fringe effects,

a please explain steps breifly and wrtie the formulas you use