Question: A particular 3 2 - bit instruction set architecture provides a two - address, register - to - memory and memory - to - register

A particular 32-bit instruction set architecture provides a two-address, register-to-memory and memory-to-register address format. Suppose that there are 95 op-codes and 64 registers. How many memory locations can be accessed by this architecture if an absolute memory address is provided? Note: a two-address instruction with a literal address is LOAD r0,1234.

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