A simpler check for 2s complement overflow during addition is to see if the CarrIn to the most significant bit is not the same as the CarryOut of the most significant bit. Prove that this check is the same as one used in Problem 1 above. Also, design hardware for this method.

problem 1 for reference) Provide the design of 2s complement overflow detection box at gate level. Your design should implement the following algorithm: the 2s complement overflow occurs if adding 2 negative operands results in positive sum or if adding 2 positive operands results in negative sum. Hint: First build the truth table.