A simplified representation for cooling in very large$-$scale integration $($VLSI$)$ of microelectronics is shown in Figure $1.$ A silicon chip is mounted in a dielectric substrate, and one surface of the system is convectively cooled, while the remaining surfaces are well insulated from the surroundings. The problem is rendered two$-$dimensional by assuming the system to be very long in the direction perpendicular to the paper. Under steady$-$state operation, electric power dissipation in the chip provides for uniform volumetric heating at a rate of $.$ However, the heating rate is limited by restriction on the maximum temperature that the chip is allowed to assume.

b$)$ If the maximum chip $($not substrate$)$ temperature is $85C,$ what is the maximum power density that the chip can dissipate? You can find this out by changing your q value until you find the one that gives the maximum temperature desired.

PLEASE ANSWER PART $($B$)$ ONLY. THANK YOU!