A synchronous sequential circuit goes through a repeating sequence of $1-2-3-1.$ It

also has an input, S$,$ that will set all flip$-$flop to $1$ when it is activated.

i$)$ Design and draw the ciruit using negative$-$edge triggered T$-$flips flops as the

main components and least number of logic gates. The flip$-$flops also have active$-$

high asynchronous inputs preset and clear.

ii$)$ Illustrate, using state diagram, on what will the response of the designed circuit

$($in $($i$))$ should the system accidentally falls into the unused state $0.$

EXPLAIN AND DRAW CORRECTLY