a. What are the differences among sequential access, direct access, and random access? b. Discuss memory hierarchy pyramid. c. Discuss the organization and structure of cache memory with the main memory. d. What are the elements of Cache design? e. Describe Pentium 4 cache design and organization and compare with ARM cache and write buffer 7. organization f. The Intel 80486 has an on-chip, unified cache. It contains 8 Kbytes and has a four-way set-associative organization and a block length of four 32-bit words. The cache is organized into 128 sets. There is a single "line valid bit" and three bits, BO, B1, and B2 (the "LRU" bits), per line. On a cache miss, the 80486 reads a 16