Question: a) Write a SystemVerilog module for synchronously resettable D flip-flop. b) Draw a circuit schematic (block diagram) for the internal design of the multifunction register

a) Write a SystemVerilog module for synchronously resettable D flip-flop.

b) Draw a circuit schematic (block diagram) for the internal design of the multifunction register

by using 4:1 multiplexers and synchronously resettable D flip-flops.

c) Write a Structural SystemVerilog module for the multifunction register you designed in part (c) and a testbench for it.

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